This invention relates to a Viterbi decoder, namely, a device for use in correcting and decoding convolutional codes in compliance with the Viterbi decoding algorithm known in the art.
A convolutional encoder and a Viterbi decoder associated therewith are capable of reducing code error rates and of increasing an effective signal-to-noise ratio in a digital communication system. In the manner which will later be described more in detail, a conventional Viterbi decoder comprises a correlator; an ACS (addition, comparison, and selection) circuit including a metric memory; a path memory; and a decoded data detecting circuit connected to the path and the metric memories. The path memory is for memorizing, at each of a plurality of time slots or branch intervals for the respective convolutional codes, survivor paths in terms of information bits. These bits are associated with the respective survivor paths of a predetermined number of time slots which include each of the above-mentioned time slots, as a latest one of the predetermined number of time slots. Conventional Viterbi decoders are defective in that the decoded data detecting circuit is complicated and has a large amount of hardware.